Analysts Question CXMT’s Two-Year DDR5 Lead Claim

Chinese memory chipmaker CXMT has said it plans to make DDR5 memory using a cell design intended to reduce the area needed for each memory cell. Analysts cited by Wccftech question the company’s claim that the approach could put it two years ahead of established memory makers.

CXMT President Dr. Cao Kanyu described the plan at the Integrated Chip and Chiplet Conference in Shanghai. The proposed design reduces the area enclosed where bit lines and word lines intersect in a DRAM array.

Wccftech reports that Rosenblatt analysts called the claim a “paper tiger.” The article says Bank of America shares that assessment and links CXMT’s position to US sanctions affecting access to EUV chip-manufacturing machines. The available source summary does not provide further details of either firm’s analysis.

The two-year lead is CXMT’s claim, not an established result. The source describes a manufacturing plan and analyst skepticism; it does not report that CXMT has already produced DDR5 chips using the proposed design.